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10 changes: 1 addition & 9 deletions src/arch/aarch64/kernel/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,8 @@ pub mod systemtime;

use alloc::alloc::{Layout, alloc};
use core::arch::global_asm;
use core::ptr;
use core::sync::atomic::{AtomicPtr, AtomicU32, Ordering};
use core::{ptr, str};

pub(crate) use self::interrupts::wakeup_core;
pub(crate) use self::processor::set_oneshot_timer;
Expand All @@ -39,10 +39,6 @@ pub(crate) static CURRENT_STACK_ADDRESS: AtomicPtr<u8> = AtomicPtr::new(ptr::nul
#[cfg(target_os = "none")]
global_asm!(include_str!("start.s"));

pub fn is_uhyve_with_pci() -> bool {
false
}

#[cfg(feature = "smp")]
pub fn get_possible_cpus() -> u32 {
let fdt = env::fdt().unwrap();
Expand All @@ -60,10 +56,6 @@ pub fn get_processor_count() -> u32 {
1
}

pub fn args() -> Option<&'static str> {
None
}

/// Real Boot Processor initialization as soon as we have put the first Welcome message on the screen.
#[cfg(target_os = "none")]
pub fn boot_processor_init() {
Expand Down
24 changes: 11 additions & 13 deletions src/arch/aarch64/kernel/serial.rs
Original file line number Diff line number Diff line change
@@ -1,8 +1,7 @@
use alloc::collections::vec_deque::VecDeque;
use core::num::NonZero;
use core::ptr::NonNull;
use core::ptr::{self, NonNull};

use arm_pl011_uart::{DataBits, Interrupts, LineConfig, Parity, StopBits, Uart, UniqueMmioPointer};
use arm_pl011_uart::{DataBits, Interrupts, LineConfig, PL011Registers, Parity, StopBits, Uart, UniqueMmioPointer};
use embedded_io::{ErrorType, Read, ReadReady, Write};
use hermit_sync::{InterruptTicketMutex, Lazy};

Expand All @@ -18,16 +17,15 @@ pub(crate) struct UartDevice {

impl UartDevice {
pub fn new() -> Self {
let base = crate::env::boot_info()
.hardware_info
.serial_port_base
.unwrap();
let base = NonZero::try_from(base).unwrap();
let base = NonNull::with_exposed_provenance(base);

let uart_pointer = unsafe { UniqueMmioPointer::new(base) };

let mut uart = Uart::new(uart_pointer);
// The loader maps the serial port to 0x1000. Eventually, the kernel
// should take care of the initial page tables. Until then, we hardcode
// the value to slowly move away from the Hermit-specific boot info
// struct.
let ptr = ptr::with_exposed_provenance_mut::<PL011Registers>(0x1000);
let ptr = NonNull::new(ptr).unwrap();
let ptr = unsafe { UniqueMmioPointer::new(ptr) };

let mut uart = Uart::new(ptr);

let line_config = LineConfig {
data_bits: DataBits::Bits8,
Expand Down
8 changes: 0 additions & 8 deletions src/arch/riscv64/kernel/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,10 +40,6 @@ static NUM_CPUS: AtomicU32 = AtomicU32::new(0);

// FUNCTIONS

pub fn is_uhyve_with_pci() -> bool {
false
}

#[cfg(feature = "smp")]
pub fn get_possible_cpus() -> u32 {
NUM_CPUS.load(Ordering::Relaxed)
Expand All @@ -59,10 +55,6 @@ pub fn get_processor_count() -> u32 {
1
}

pub fn args() -> Option<&'static str> {
None
}

pub fn get_hart_mask() -> u64 {
HART_MASK.load(Ordering::Relaxed)
}
Expand Down
35 changes: 7 additions & 28 deletions src/arch/x86_64/kernel/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ use x86_64::registers::control::{Cr0, Cr4};

pub(crate) use self::apic::{set_oneshot_timer, wakeup_core};
use crate::arch::x86_64::kernel::core_local::*;
use crate::env::{self, is_uhyve};
use crate::env;

#[cfg(feature = "acpi")]
pub mod acpi;
Expand Down Expand Up @@ -40,14 +40,8 @@ pub mod vga;

#[cfg(feature = "smp")]
pub fn get_possible_cpus() -> u32 {
use core::cmp;

match env::boot_info().platform_info {
// FIXME: Remove get_processor_count after a transition period for uhyve 0.1.3 adoption
PlatformInfo::Uhyve { num_cpus, .. } => cmp::max(
u32::try_from(num_cpus.get()).unwrap(),
get_processor_count(),
),
PlatformInfo::Uhyve { num_cpus, .. } => u32::try_from(num_cpus.get()).unwrap(),
_ => apic::local_apic_id_count(),
}
}
Expand All @@ -62,28 +56,13 @@ pub fn get_processor_count() -> u32 {
1
}

pub fn is_uhyve_with_pci() -> bool {
matches!(
env::boot_info().platform_info,
PlatformInfo::Uhyve { has_pci: true, .. }
)
}

pub fn args() -> Option<&'static str> {
match env::boot_info().platform_info {
PlatformInfo::Multiboot { command_line, .. }
| PlatformInfo::LinuxBootParams { command_line, .. } => command_line,
_ => None,
}
}

/// Real Boot Processor initialization as soon as we have put the first Welcome message on the screen.
#[cfg(target_os = "none")]
pub fn boot_processor_init() {
processor::detect_features();
processor::configure();

if cfg!(feature = "vga") && !is_uhyve() {
if cfg!(feature = "vga") && !env::is_uhyve() {
#[cfg(feature = "vga")]
vga::init();
}
Expand All @@ -103,11 +82,11 @@ pub fn boot_processor_init() {
interrupts::install();
systemtime::init();

if !is_uhyve() {
if !env::is_uhyve() {
#[cfg(feature = "acpi")]
acpi::init();
}
if is_uhyve_with_pci() || !is_uhyve() {
if env::is_uhyve_with_pci() || !env::is_uhyve() {
#[cfg(feature = "pci")]
pci::init();
}
Expand All @@ -134,7 +113,7 @@ pub fn application_processor_init() {
}

fn finish_processor_init() {
if is_uhyve() {
if env::is_uhyve() {
// uhyve does not use apic::detect_from_acpi and therefore does not know the number of processors and
// their APIC IDs in advance.
// Therefore, we have to add each booted processor into the CPU_LOCAL_APIC_IDS vector ourselves.
Expand All @@ -152,7 +131,7 @@ pub fn boot_next_processor() {
// to initialize the next processor.
let cpu_online = CPU_ONLINE.fetch_add(1, Ordering::Release);

if !is_uhyve() {
if !env::is_uhyve() {
if cpu_online == 0 {
#[cfg(all(target_os = "none", feature = "smp"))]
apic::boot_application_processors();
Expand Down
8 changes: 2 additions & 6 deletions src/arch/x86_64/kernel/serial.rs
Original file line number Diff line number Diff line change
Expand Up @@ -24,12 +24,8 @@ struct UartDevice {

impl UartDevice {
pub unsafe fn new() -> Self {
let base = crate::env::boot_info()
.hardware_info
.serial_port_base
.unwrap()
.get();
let mut uart = unsafe { Uart16550::new_port(base).unwrap() };
let base_port = 0x3f8;
let mut uart = unsafe { Uart16550::new_port(base_port).unwrap() };
uart.init(Config::default()).ok();
// Once we have a fallback destination for output,
// we should log any error above and run
Expand Down
11 changes: 8 additions & 3 deletions src/env.rs
Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,6 @@ use hermit_entry::boot_info::{BootInfo, PlatformInfo, RawBootInfo};
use hermit_sync::OnceCell;
use memory_addresses::PhysAddr;

use crate::arch::kernel;

static BOOT_INFO: OnceCell<BootInfo> = OnceCell::new();

pub fn boot_info() -> &'static BootInfo {
Expand Down Expand Up @@ -49,6 +47,13 @@ pub fn is_uhyve() -> bool {
matches!(boot_info().platform_info, PlatformInfo::Uhyve { .. })
}

pub fn is_uhyve_with_pci() -> bool {
matches!(
boot_info().platform_info,
PlatformInfo::Uhyve { has_pci: true, .. }
)
}

pub fn is_uefi() -> bool {
fdt().is_some_and(|fdt| fdt.root().compatible().first() == "hermit,uefi")
}
Expand Down Expand Up @@ -92,7 +97,7 @@ impl Default for Cli {
RandomState::with_seeds(0, 0, 0, 0),
);

let args = kernel::args().or_else(fdt_args).unwrap_or_default();
let args = fdt_args().unwrap_or_default();
info!("bootargs = {args}");
let words = shell_words::split(args).unwrap();

Expand Down
2 changes: 1 addition & 1 deletion src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -285,7 +285,7 @@ fn boot_processor_main() -> ! {
#[cfg(feature = "smp")]
synch_all_cores();

if kernel::is_uhyve_with_pci() || !env::is_uhyve() {
if env::is_uhyve_with_pci() || !env::is_uhyve() {
#[cfg(feature = "pci")]
drivers::pci::print_information();
}
Expand Down
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