Morse code translator on Intel DE10-Lite FPGA in Verilog HDL — FSM-driven LED/relay output with 7-segment display (EECS 3201)
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Updated
Jul 7, 2026 - Verilog
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intel-de10-lite
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A 4-bit arithmetic calculator built in Verilog on the Intel DE10-Lite FPGA. Performs addition and two’s-complement subtraction with results displayed on seven-segment LEDs.
fpga embedded-systems verilog digital-logic adder subtractor seven-segment-display hardware-design intel-de10-lite
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Updated
Oct 31, 2025 - Verilog
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